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Circuit Systems with MATLAB 1 and PSpice 1 Circuit Systems with MATLAB

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The paper explores the integration of MATLAB and PSpice in the education of electric circuit theory for Electrical Engineering students. It emphasizes the Laplace transform method for circuit analysis and presents practical MATLAB programs for solving circuit equations. Additionally, the book guides readers through using PSpice for circuit simulations, promoting a balanced understanding of both theoretical and practical aspects of circuit design.

Figures (526)

Table 1.1 SI units
Table 1.1 SI units
Figure 1.2.1 No reference polarity for voltages Figure 1.2.2 With reference polarity for voltages
Figure 1.2.1 No reference polarity for voltages Figure 1.2.2 With reference polarity for voltages
Figure 1.4.1 Reference polarity of voltage and reference direction of current associated by the passive sigr convention Figure 1.4.2 Passive sign convention and the sign of power
Figure 1.4.1 Reference polarity of voltage and reference direction of current associated by the passive sigr convention Figure 1.4.2 Passive sign convention and the sign of power
Note For the four types of dependent sources, the gains (proportionality coefficients) #, 4, G, and # multiplied by the controlling variables are used to denote their PSpice part names, respectively, Figure 1.8.2 Symbols for dependent (controlled) sources
Note For the four types of dependent sources, the gains (proportionality coefficients) #, 4, G, and # multiplied by the controlling variables are used to denote their PSpice part names, respectively, Figure 1.8.2 Symbols for dependent (controlled) sources
Figure 1.8.1 Symbols for independent sources
Figure 1.8.1 Symbols for independent sources
The operational amplifier (OP Amp) is probably the most versatile chip available. It was originally designed to be used for analog computers that perform mathematical operations such as addition. Figure 1.9 Modeling of practical sources
The operational amplifier (OP Amp) is probably the most versatile chip available. It was originally designed to be used for analog computers that perform mathematical operations such as addition. Figure 1.9 Modeling of practical sources
Figure 1.10 Symbol, model, and differential input-output relationship of an OP Amp
Figure 1.10 Symbol, model, and differential input-output relationship of an OP Amp
Figure 1.11.2 Symbol and model for an NPN-type BJT (bipolar junction transistor)
Figure 1.11.2 Symbol and model for an NPN-type BJT (bipolar junction transistor)
Figure 1.11.1. Symbol and model for an NPN-type BJT (bipolar junction transistor) terminals can be regarded as being open in terms of current in the sense that no current flows into or out of them, i.e.
Figure 1.11.1. Symbol and model for an NPN-type BJT (bipolar junction transistor) terminals can be regarded as being open in terms of current in the sense that no current flows into or out of them, i.e.
Figure 1.12.1 Branches, nodes, and closed surfaces
Figure 1.12.1 Branches, nodes, and closed surfaces
Figure 1.12.2 Branches, meshes, and loops
Figure 1.12.2 Branches, meshes, and loops
The following example shows how KCL is applied to the nodes of a circuit. Figure 1.13 Applying KCL to a node or a closed surface
The following example shows how KCL is applied to the nodes of a circuit. Figure 1.13 Applying KCL to a node or a closed surface
Figure 1.14 Applying KCL to a node, a supernode, and a closed surface
Figure 1.14 Applying KCL to a node, a supernode, and a closed surface
(Answer) No, because the voltage across the current source J; (hanging on to those meshes) is not specified in terms of its current. Figure 1.16 Applying KVL to a mesh, a supermesh, and a loop
(Answer) No, because the voltage across the current source J; (hanging on to those meshes) is not specified in terms of its current. Figure 1.16 Applying KVL to a mesh, a supermesh, and a loop
Figure 1.15 Applying KVL to meshes (loops)
Figure 1.15 Applying KVL to meshes (loops)
Figure 1.17.1. Example graph to illustrate fundamental cutsets formed in such a way that every cutset has a distinct tree branch exclusively Figure 1.17.2. Example graph to illustrate fundamental loops formed by adding a branch (link) to a set of tree branches
Figure 1.17.1. Example graph to illustrate fundamental cutsets formed in such a way that every cutset has a distinct tree branch exclusively Figure 1.17.2. Example graph to illustrate fundamental loops formed by adding a branch (link) to a set of tree branches
Figure 1.17.1. Example graph to illustrate fundamental cutsets formed in such a way that every cutset has a distinct tree branch exclusively
Figure 1.17.1. Example graph to illustrate fundamental cutsets formed in such a way that every cutset has a distinct tree branch exclusively
Figure 1.18.7 Voltage and current sources in series Figure 1.18.8 Voltage and current sources in parallel
Figure 1.18.7 Voltage and current sources in series Figure 1.18.8 Voltage and current sources in parallel
Figure 1.18.7 Voltage and current sources in series Figure 1.18.8 Voltage and current sources in parallel
Figure 1.18.7 Voltage and current sources in series Figure 1.18.8 Voltage and current sources in parallel
Figure 1.19 Equivalence of voltage and current sources
Figure 1.19 Equivalence of voltage and current sources
Figure 1.20.1 Parallel duplication of a voltage source for voltage-to-current transformatior
Figure 1.20.1 Parallel duplication of a voltage source for voltage-to-current transformatior
Figure 1.20.2 Series duplication of a current source for current-to-voltage transformatior
Figure 1.20.2 Series duplication of a current source for current-to-voltage transformatior
To practice source transformation, let us make the source transformations of the three sources in the circuit of Figure 1.21.1. Figure 1.21.1 A circuit
To practice source transformation, let us make the source transformations of the three sources in the circuit of Figure 1.21.1. Figure 1.21.1 A circuit
Figure 1.21.2 Voltage-to-current source transformation using parallel duplication of the V-source
Figure 1.21.2 Voltage-to-current source transformation using parallel duplication of the V-source
Figure 1.21.2 Voltage-to-current source transformation using parallel duplication of the V-source Figure 1.21.3 Voltage-to-current source transformation using parallel duplication of the V-sourc«
Figure 1.21.2 Voltage-to-current source transformation using parallel duplication of the V-source Figure 1.21.3 Voltage-to-current source transformation using parallel duplication of the V-sourc«
Figure 1.21.3 Voltage-to-current source transformation using parallel duplication of the V-sourc« Figure 1.21.4 Current-to-voltage source transformation using series duplication of the I-sourc¢
Figure 1.21.3 Voltage-to-current source transformation using parallel duplication of the V-sourc« Figure 1.21.4 Current-to-voltage source transformation using series duplication of the I-sourc¢
Figure 1.21.5 Current-to-voltage source transformation using series duplication of the I-source
Figure 1.21.5 Current-to-voltage source transformation using series duplication of the I-source
Consider the R-2R ladder circuit of Figure P1.5.
Consider the R-2R ladder circuit of Figure P1.5.
Consider the circuit of Figure P1.8.
Consider the circuit of Figure P1.8.
Figure P1.10 Simplification of the circuit using the source transformation
Figure P1.10 Simplification of the circuit using the source transformation
Figure 2.1 Series/parallel connection of resistors Note. The series combination of resistors yields the equivalent resistance, which is larger than any one of the resistances.
Figure 2.1 Series/parallel connection of resistors Note. The series combination of resistors yields the equivalent resistance, which is larger than any one of the resistances.
Figure 2.3 Voltage divider and current divider
Figure 2.3 Voltage divider and current divider
Figure 2.2. An example of resistors in a series—parallel connection
Figure 2.2. An example of resistors in a series—parallel connection
Figure 2.4 A (II) connection and Y (T) connection
Figure 2.4 A (II) connection and Y (T) connection
Figure 2.5.2 Conditions for equivalence of a A(II)-connection and a Y(T)-connection
Figure 2.5.2 Conditions for equivalence of a A(II)-connection and a Y(T)-connection
Figure 2.5.1 Conditions for equivalence of a A(I])-connection and a Y(T)-connection
Figure 2.5.1 Conditions for equivalence of a A(I])-connection and a Y(T)-connection
Table 2.1. A-Y(II-T) and Y-A(T-ID conversion formulas Taking the reciprocals of these three equations yields
Table 2.1. A-Y(II-T) and Y-A(T-ID conversion formulas Taking the reciprocals of these three equations yields
Taking the reciprocals of these three equations yields Dividing the summation of these three equations by two yields
Taking the reciprocals of these three equations yields Dividing the summation of these three equations by two yields
Step 0. Select one node as the reference node and label it 0, assuming its node voltage to be zero. (Th reference node is usually chosen to be the node with the most connections, like the bottom nod« Figure 2.6 A circuit with independent voltage sources
Step 0. Select one node as the reference node and label it 0, assuming its node voltage to be zero. (Th reference node is usually chosen to be the node with the most connections, like the bottom nod« Figure 2.6 A circuit with independent voltage sources
Figure 2.7(b) shows the solution for the node voltages and the resulting branch currents. Note. See Appendix B for more details about matrix inversion.
Figure 2.7(b) shows the solution for the node voltages and the resulting branch currents. Note. See Appendix B for more details about matrix inversion.
Figure 2.7 Circuit with independent current sources and its solution for Example 2.2
Figure 2.7 Circuit with independent current sources and its solution for Example 2.2
Whichever method is used, we find the current, ip,, through the 3S resistor in the circuit of Figure 2.8(a), based on the node voltages: Figure 2.8 Circuit with current and voltage sources for Example 2.3
Whichever method is used, we find the current, ip,, through the 3S resistor in the circuit of Figure 2.8(a), based on the node voltages: Figure 2.8 Circuit with current and voltage sources for Example 2.3
Since there are only two equations with three unknowns, one more equation is needed, which will be provided by the matchmaker, the 1 V voltage source, between the two nodes | and 2: We substitute this equation into Equation (E2.4.1) and solve it as Figure 2.9 Circuit and its equivalents for Example 2.4
Since there are only two equations with three unknowns, one more equation is needed, which will be provided by the matchmaker, the 1 V voltage source, between the two nodes | and 2: We substitute this equation into Equation (E2.4.1) and solve it as Figure 2.9 Circuit and its equivalents for Example 2.4
Then the formula (2.10) is used to set up the node equation as Figure 2.10 Circuit for Example 2.5
Then the formula (2.10) is used to set up the node equation as Figure 2.10 Circuit for Example 2.5
This equation and Equation (E2.6.1) can be substituted into Equation (E2.6.2), which is solved as Figure 2.11 Circuit and its equivalent for Example 2.6
This equation and Equation (E2.6.1) can be substituted into Equation (E2.6.2), which is solved as Figure 2.11 Circuit and its equivalent for Example 2.6
Figure 2.12 Circuit and its equivalents for Example 2.7
Figure 2.12 Circuit and its equivalents for Example 2.7
Figure 2.13 A two-mesh circuit with independent voltage sources
Figure 2.13 A two-mesh circuit with independent voltage sources
Figure 2.14 Circuit and its solution for Example 2.8
Figure 2.14 Circuit and its solution for Example 2.8
Figure 2.14(b) shows the solution for the mesh currents and the resulting branch currents.
Figure 2.14(b) shows the solution for the mesh currents and the resulting branch currents.
Figure 2.15 Circuit with current sources and its equivalent for Example 2.9
Figure 2.15 Circuit with current sources and its equivalent for Example 2.9
Then the formula (2.12) is used to set up the mesh equation as Figure 2.17 Two-mesh circuit with a dependent voltage source for Example 2.11
Then the formula (2.12) is used to set up the mesh equation as Figure 2.17 Two-mesh circuit with a dependent voltage source for Example 2.11
This equation and Equation (E2.12.1) can be substituted into Eq. (E2.12.2) and solved as Figure 2.18 Circuit with a dependent current source and its equivalent for Example 2.12
This equation and Equation (E2.12.1) can be substituted into Eq. (E2.12.2) and solved as Figure 2.18 Circuit with a dependent current source and its equivalent for Example 2.12
Figure 2.19 Circuit and its equivalents for Example 2.13
Figure 2.19 Circuit and its equivalents for Example 2.13
Noting that the 6 V voltage source is connected to the reference node at one end, the node equation can be set up without thinking of ‘supernode’ in terms of having no voltage source: Figure 2.20 Circuit and its equivalents for Example 2.14
Noting that the 6 V voltage source is connected to the reference node at one end, the node equation can be set up without thinking of ‘supernode’ in terms of having no voltage source: Figure 2.20 Circuit and its equivalents for Example 2.14
(b13 Parallel duplication of voltage sources (b2) Voltage-to-current source transformations Figure 2.21 Circuit and its equivalents for Example 2.15
(b13 Parallel duplication of voltage sources (b2) Voltage-to-current source transformations Figure 2.21 Circuit and its equivalents for Example 2.15
Figure 2.22 Circuit and its equivalents for Example 2.16
Figure 2.22 Circuit and its equivalents for Example 2.16
Figure 2.23 Thevenin and Norton equivalent circuits
Figure 2.23 Thevenin and Norton equivalent circuits
Figure 2.24 One-shot method for obtaining a Thevenin equlivalent circuit
Figure 2.24 One-shot method for obtaining a Thevenin equlivalent circuit
Figure 2.25 Bridge circuits for Example 2.18
Figure 2.25 Bridge circuits for Example 2.18
Figure 2.26 To find the equivalent circuit for Example 2.19
Figure 2.26 To find the equivalent circuit for Example 2.19
Figure 2.27 Thevenin equivalent of a circuit containing a dependent source for Example 2.2(
Figure 2.27 Thevenin equivalent of a circuit containing a dependent source for Example 2.2(
Figure 2.28 Thevenin equivalent of a circuit containing two dependent sources (Example 2.21)
Figure 2.28 Thevenin equivalent of a circuit containing two dependent sources (Example 2.21)
Figure 2.29 Circuits for Example 2.22 showing the superposition principle
Figure 2.29 Circuits for Example 2.22 showing the superposition principle
is set up, which can be solved for the mesh current i as Finally, the output voltage v. is found by subtracting the voltage drop across R; and R; from the input voltage v; as
is set up, which can be solved for the mesh current i as Finally, the output voltage v. is found by subtracting the voltage drop across R; and R; from the input voltage v; as
where it is reasonable to assume that 1 + R-/R, <A, as mentioned above. Figure 2.31 Noninverting OP Amp circuit
where it is reasonable to assume that 1 + R-/R, <A, as mentioned above. Figure 2.31 Noninverting OP Amp circuit
Figure 2.33 Voltage follower for removing or reducing the load effect
Figure 2.33 Voltage follower for removing or reducing the load effect
This equation for v, can be solved as This naturally agrees with Equation (2.18) or (2.21).
This equation for v, can be solved as This naturally agrees with Equation (2.18) or (2.21).
Figure 2.34 Inverting and noninverting OP Amp circuits with a practical model
Figure 2.34 Inverting and noninverting OP Amp circuits with a practical model
This equation can be solved for v, as
This equation can be solved for v, as
Figure 2.35 Inverting positive feedback OP Amp circuit and its input—output relationship (transfer characteristic)
Figure 2.35 Inverting positive feedback OP Amp circuit and its input—output relationship (transfer characteristic)
‘igure 2.36 Noninverting positive feedback OP Amp circuit and its input—output relationship (transfer characteristic)
‘igure 2.36 Noninverting positive feedback OP Amp circuit and its input—output relationship (transfer characteristic)
Figure 2.37 A transistor circuit and its equivalents
Figure 2.37 A transistor circuit and its equivalents
Figure 2.38 Models of voltage/current amplifiers
Figure 2.38 Models of voltage/current amplifiers
Figure 2.40 Variation of the voltage and current of a nonlinear resistor around the operating point
Figure 2.40 Variation of the voltage and current of a nonlinear resistor around the operating point
We can write the output voltages in terms of a variable load resistance Ry and find their variations as
We can write the output voltages in terms of a variable load resistance Ry and find their variations as
Figure 2.43 The circuit for Example 2.26
Figure 2.43 The circuit for Example 2.26
This result can be used to get the expression of the test voltage in terms of the test current as
This result can be used to get the expression of the test voltage in terms of the test current as
This result can be used to obtain the expression of the test voltage in terms of the test current as
This result can be used to obtain the expression of the test voltage in terms of the test current as
Figure 2.45 A resistor circuit for a defroster
Figure 2.45 A resistor circuit for a defroster
Figure 2.47 Difference amplifier circuit
Figure 2.47 Difference amplifier circuit
Figure 2.48 Circuits for Example 2.31 (From Reference [T-1]. Source: © Prentice-Hall)
Figure 2.48 Circuits for Example 2.31 (From Reference [T-1]. Source: © Prentice-Hall)
Figure 2.49 PSpice schematics and simulation results for Example 2.3! With Equation (E2.31.1) for Figure 2.48(a), this condition can be written a:
Figure 2.49 PSpice schematics and simulation results for Example 2.3! With Equation (E2.31.1) for Figure 2.48(a), this condition can be written a:
>>format rat, possible comb ([],[1111))
>>format rat, possible comb ([],[1111))
Figure P2.11 Finding the Thevenin equivalent
Figure P2.11 Finding the Thevenin equivalent
Figure P2.11 Finding the Thevenin equivalent Figure P2.12 A noninverting OP Amp circuit
Figure P2.11 Finding the Thevenin equivalent Figure P2.12 A noninverting OP Amp circuit
Find the Thevenin equivalent of the circuit seen from terminals c-d in Figure P2.13.
Find the Thevenin equivalent of the circuit seen from terminals c-d in Figure P2.13.
Find the Thevenin equivalent of the circuit seen from terminals 2 and 0 in Figure P2.1¢
Find the Thevenin equivalent of the circuit seen from terminals 2 and 0 in Figure P2.1¢
Consider the OP Amp circuit shown in Figure P2.19.
Consider the OP Amp circuit shown in Figure P2.19.
Figure P2.21 Fahrenheit-to-centigrade converter using OP Amps
Figure P2.21 Fahrenheit-to-centigrade converter using OP Amps
Show that the voltage gain of the OP Amp circuit shown in Figure P2.24 is Figure P2.24 Feedforward—feedback OP Amp circuit
Show that the voltage gain of the OP Amp circuit shown in Figure P2.24 is Figure P2.24 Feedforward—feedback OP Amp circuit
Figure P2.23 Voltage polarity changer
Figure P2.23 Voltage polarity changer
Note. Note that this load current does not vary with the load resistance R1.. Figure P2.25 Load current controller
Note. Note that this load current does not vary with the load resistance R1.. Figure P2.25 Load current controller
‘igure P2.26.1 Voltage-to-current converter Figure P2.26.2 PSpice simulation of the voltage-to-current converter
‘igure P2.26.1 Voltage-to-current converter Figure P2.26.2 PSpice simulation of the voltage-to-current converter
Note. The typical value of the DC current gain f(/pg) is greater than 50 for the BJT 2N2222, as can be seen at th website (http://www.alldatasheet.com/view.jsp?Searchword=2N2).
Note. The typical value of the DC current gain f(/pg) is greater than 50 for the BJT 2N2222, as can be seen at th website (http://www.alldatasheet.com/view.jsp?Searchword=2N2).
Table 3.1 Characteristics of inductors and capacitors
Table 3.1 Characteristics of inductors and capacitors
Figure 3.3 Series/parallel combination of inductors and all the inductor voltages can be summed to obtain the overall voltage
Figure 3.3 Series/parallel combination of inductors and all the inductor voltages can be summed to obtain the overall voltage
Figure 3.4 Series/parallel combination of capacitors This implies that the equivalent inverse capacitance of N capacitors in series is the sum of all the individual inverse capacitances:
Figure 3.4 Series/parallel combination of capacitors This implies that the equivalent inverse capacitance of N capacitors in series is the sum of all the individual inverse capacitances:
Table 3.2 Laplace transforms of basic functions
Table 3.2 Laplace transforms of basic functions
Figure 3.5 The Laplace transform method for solving differential equations
Figure 3.5 The Laplace transform method for solving differential equations
Table 3.3. Properties of the Laplace transform This algebraic equation is solved to get the s-domain solution
Table 3.3. Properties of the Laplace transform This algebraic equation is solved to get the s-domain solution
Figure 3.6 The transformed (s-domain) equivalent circuits of R, L, and C
Figure 3.6 The transformed (s-domain) equivalent circuits of R, L, and C
which is equal to the initial inductor current i(0~ ) = J, as claimed by the continuity rule (3.2). Second. substituting t = oo into the solution (3.19) yields Figure 3.7 An RL circuit and its transformed (s-domain) equivalent circuits
which is equal to the initial inductor current i(0~ ) = J, as claimed by the continuity rule (3.2). Second. substituting t = oo into the solution (3.19) yields Figure 3.7 An RL circuit and its transformed (s-domain) equivalent circuits
Taking the Laplace transform of both sides and using Table 3.3(6) yields The inverse Laplace transform of this s-domain solution can be taken to obtained to get the t-domair solution
Taking the Laplace transform of both sides and using Table 3.3(6) yields The inverse Laplace transform of this s-domain solution can be taken to obtained to get the t-domair solution
which reflects that the initial capacitor voltage at the switching instant t = 0 is equal to vc(O~) = Vo, a: claimed by the continuity rule (3.5). Second, substituting tf = oo into the solution (3.30) yields Figure 3.8 An RC circuit and its transformed (s-domain) equivalent circuits
which reflects that the initial capacitor voltage at the switching instant t = 0 is equal to vc(O~) = Vo, a: claimed by the continuity rule (3.5). Second, substituting tf = oo into the solution (3.30) yields Figure 3.8 An RC circuit and its transformed (s-domain) equivalent circuits
Taking the Laplace transform of both sides and using Table 3.3(6) yields [he inverse Laplace transform of this s-domain solution can be taken to obtain the t-domain solution
Taking the Laplace transform of both sides and using Table 3.3(6) yields [he inverse Laplace transform of this s-domain solution can be taken to obtain the t-domain solution
Figure 3.9 The forced/natural responses and the time constants of first-order circuits
Figure 3.9 The forced/natural responses and the time constants of first-order circuits
Figure 3.10.1 A first-order RL circuit with multiple resistors and its s-domain equivalent Figure 3.10.2 A first-order RC circuit with multiple resistors and its s-domain equivalent
Figure 3.10.1 A first-order RL circuit with multiple resistors and its s-domain equivalent Figure 3.10.2 A first-order RC circuit with multiple resistors and its s-domain equivalent
Figure 3.10.1 A first-order RL circuit with multiple resistors and its s-domain equivalent Figure 3.10.2 A first-order RC circuit with multiple resistors and its s-domain equivalent
Figure 3.10.1 A first-order RL circuit with multiple resistors and its s-domain equivalent Figure 3.10.2 A first-order RC circuit with multiple resistors and its s-domain equivalent
Figure 3.11 An RL circuit containing a dependent (controlled) source for Example 3.2
Figure 3.11 An RL circuit containing a dependent (controlled) source for Example 3.2
Note that the initial/final currents can also be obtained from the circuit of Figure 3.11(d1):
Note that the initial/final currents can also be obtained from the circuit of Figure 3.11(d1):
Thus, the formula (3.39) can be used to obtain the inductor current for t > t)[s] (after the second switching instant t,) as Figure 3.12 Sequential switchings in an RL circuit and an RC circuit
Thus, the formula (3.39) can be used to obtain the inductor current for t > t)[s] (after the second switching instant t,) as Figure 3.12 Sequential switchings in an RL circuit and an RC circuit
Finally, the inverse Laplace transform of the s-domain solution (3.54) is taken to obtair which is depicted in Figure 3.13(b) (see Section 3.7.2).
Finally, the inverse Laplace transform of the s-domain solution (3.54) is taken to obtair which is depicted in Figure 3.13(b) (see Section 3.7.2).
onse of an RZ circuit to an AC input (b} The response of an FC circuit to an AC in
onse of an RZ circuit to an AC input (b} The response of an FC circuit to an AC in
(b2) The s-domain equivalent of the differentiator Figure 3.14 First-order circuits containing an OP Amp
(b2) The s-domain equivalent of the differentiator Figure 3.14 First-order circuits containing an OP Amp
(b) The Probe output waveform in the PSpice A/D (Probe) window Figure 3.15 An RC OP Amp circuit with positive/negative feedback as a square-wave generato
(b) The Probe output waveform in the PSpice A/D (Probe) window Figure 3.15 An RC OP Amp circuit with positive/negative feedback as a square-wave generato
(b) The Probe output waveform in the PSpice A/D (Probe) window Figure 3.15 An RC OP Amp circuit with positive/negative feedback as a square-wave generato
(b) The Probe output waveform in the PSpice A/D (Probe) window Figure 3.15 An RC OP Amp circuit with positive/negative feedback as a square-wave generato
(a) The PSpice schematic for a rectangular/triangular generator using two OP Amps Figure 3.16 A combination of an inverting integrator and a noninverting trigge
(a) The PSpice schematic for a rectangular/triangular generator using two OP Amps Figure 3.16 A combination of an inverting integrator and a noninverting trigge
(a) The PSpice schematic for a rectangular/triangular generator using two OP Amps
(a) The PSpice schematic for a rectangular/triangular generator using two OP Amps
(a) The PSpice schematic for a rectangular/triangular generator using two OP Amps Figure 3.16 A combination of an inverting integrator and a noninverting trigge
(a) The PSpice schematic for a rectangular/triangular generator using two OP Amps Figure 3.16 A combination of an inverting integrator and a noninverting trigge
The currents through L; and L» can also be found as As a consequence, the two inductors will have the flux linkages as
The currents through L; and L» can also be found as As a consequence, the two inductors will have the flux linkages as
Figure 3.17 An LRL circuit and s-domain equivalent The sum of the magnetic field energies stored in the two inductors is
Figure 3.17 An LRL circuit and s-domain equivalent The sum of the magnetic field energies stored in the two inductors is
The voltages can also be found across C; and C> as Figure 3.18 A CRC circuit and its s-domain equivalent
The voltages can also be found across C; and C> as Figure 3.18 A CRC circuit and its s-domain equivalent
Figure 3.19 A circuit using a free-wheeling diode to allow the inductor current to flow continuously
Figure 3.19 A circuit using a free-wheeling diode to allow the inductor current to flow continuously
(a) The PSpice schematic for the RC circuit with sequential switching ») The Property Editor spreadsheet for setting the parameter values of C, Sw_tClose, and Sw_tOper
(a) The PSpice schematic for the RC circuit with sequential switching ») The Property Editor spreadsheet for setting the parameter values of C, Sw_tClose, and Sw_tOper
») The Property Editor spreadsheet for setting the parameter values of C, Sw_tClose, and Sw_tOper
») The Property Editor spreadsheet for setting the parameter values of C, Sw_tClose, and Sw_tOper
(a) The PSpice schematic for the RC circuit with sequential switching ») The Property Editor spreadsheet for setting the parameter values of C, Sw_tClose, and Sw_tOper
(a) The PSpice schematic for the RC circuit with sequential switching ») The Property Editor spreadsheet for setting the parameter values of C, Sw_tClose, and Sw_tOper
b) The Property Editor spreadsheet for setting the parameter values of ¥SIN (refer to Fig, H.3¢al)) Figure 3.21 PSpice simulation and MATLAB analysis for an RL circuit excited by a sinusoidal voltage source
b) The Property Editor spreadsheet for setting the parameter values of ¥SIN (refer to Fig, H.3¢al)) Figure 3.21 PSpice simulation and MATLAB analysis for an RL circuit excited by a sinusoidal voltage source
Figure 3.22 Applications of the 555 timer
Figure 3.22 Applications of the 555 timer
Figure 3.22 Applications of the 555 timer
Figure 3.22 Applications of the 555 timer
Figure 3.24 RC circuit of a flashing lamp
Figure 3.24 RC circuit of a flashing lamp
Figure 3.23 A circuit design of Example 3.5 Thus MATLAB can be used to obtain
Figure 3.23 A circuit design of Example 3.5 Thus MATLAB can be used to obtain
Figure 3.25 The simulation results for the flashing lamp circuit depicted in Figure 3.24
Figure 3.25 The simulation results for the flashing lamp circuit depicted in Figure 3.24
2. It uses the discretized version of the circuit equation with the sampling period T as Figure 3.25 The simulation results for the flashing lamp circuit depicted in Figure 3.24
2. It uses the discretized version of the circuit equation with the sampling period T as Figure 3.25 The simulation results for the flashing lamp circuit depicted in Figure 3.24
Figure P3.1 An RL circuit for relay control
Figure P3.1 An RL circuit for relay control
Figure P3.2 A chopper for an RL load
Figure P3.2 A chopper for an RL load
Figure P3.3 A model of a nonideal switch for representing the effect of its switch capacitance on switching
Figure P3.3 A model of a nonideal switch for representing the effect of its switch capacitance on switching
Figure P3.6 The equivalent circuits of a half-wave rectifier and its input/output voltage waveforms
Figure P3.6 The equivalent circuits of a half-wave rectifier and its input/output voltage waveforms
Figure P3.6 The equivalent circuits of a half-wave rectifier and its input/output voltage waveforms
Figure P3.6 The equivalent circuits of a half-wave rectifier and its input/output voltage waveforms
fc2) Equivalent circuit for the pull-down case
fc2) Equivalent circuit for the pull-down case
Consider the RL circuit of Figure P3.11.
Consider the RL circuit of Figure P3.11.
Consider the RC circuit of Figure P3.10.
Consider the RC circuit of Figure P3.10.
3.15 The Input-Output Relationship of a First-Order Circuit Containing a Dependent Source
3.15 The Input-Output Relationship of a First-Order Circuit Containing a Dependent Source
Figure P3.18 An analog computer for solving a differential equation
Figure P3.18 An analog computer for solving a differential equation
Consider the circuit of Figure P3.21.
Consider the circuit of Figure P3.21.
AC (alternating current) impedance of a capacitance C has the magnitude of 1/(@C), which is called the reactance (see Section 6.3.3).
AC (alternating current) impedance of a capacitance C has the magnitude of 1/(@C), which is called the reactance (see Section 6.3.3).
Figure P3.23. Two types of power-on delays realized by a 555 timer
Figure P3.23. Two types of power-on delays realized by a 555 timer
Figure 4.1 Locations of characteristics roots, the natural responses, and the system stability
Figure 4.1 Locations of characteristics roots, the natural responses, and the system stability
Figure 4.2.1 The circuit for Example 4.1
Figure 4.2.1 The circuit for Example 4.1
Noting that this mesh current flows through the inductor and the capacitor in series, the s-domain V-J relationships (3.15a) and (3.16b) are used to obtain the voltages across them as
Noting that this mesh current flows through the inductor and the capacitor in series, the s-domain V-J relationships (3.15a) and (3.16b) are used to obtain the voltages across them as
These results might be obtained by using the time-domain v—i relationships (3.1a) and (3.4b).
These results might be obtained by using the time-domain v—i relationships (3.1a) and (3.4b).
The s-domain V-/ relationships (3.15a) and (3.16b) are used to obtain the voltages across the inductor and capacitor as and then the coefficient comparison method is used; i.e. we make the terms on the RHS have the common denominator and equate the numerators on both sides to write a set of equations and solve it
The s-domain V-/ relationships (3.15a) and (3.16b) are used to obtain the voltages across the inductor and capacitor as and then the coefficient comparison method is used; i.e. we make the terms on the RHS have the common denominator and equate the numerators on both sides to write a set of equations and solve it
Figure 4.2.2 The output voltage/current of the circuit depicted in Figure 4.2.1 (Example 4.1 Note. The result makes us happy with the Laplace transform and MATLAB or equivalent software. On the other hand it makec ne feel earry far thace who have not exnerienced the amazing neefiulnece and canvenience af ench tanic
Figure 4.2.2 The output voltage/current of the circuit depicted in Figure 4.2.1 (Example 4.1 Note. The result makes us happy with the Laplace transform and MATLAB or equivalent software. On the other hand it makec ne feel earry far thace who have not exnerienced the amazing neefiulnece and canvenience af ench tanic
Figure 4.2.2 The output voltage/current of the circuit depicted in Figure 4.2.1 (Example 4.1
Figure 4.2.2 The output voltage/current of the circuit depicted in Figure 4.2.1 (Example 4.1
Figure 4.3.1 The RLC circuit for Example 4.2
Figure 4.3.1 The RLC circuit for Example 4.2
Figure 4.3.2 The simulation results for the circuit in Figure 4.3.1
Figure 4.3.2 The simulation results for the circuit in Figure 4.3.1
Figure 4.4.1. The circuit for Example 4.3
Figure 4.4.1. The circuit for Example 4.3
Figure 4.4.2 The output voltage of the circuit depicted in Figure 4.4.1 (Example 4.3
Figure 4.4.2 The output voltage of the circuit depicted in Figure 4.4.1 (Example 4.3
Figure 4.4.2 The output voltage of the circuit depicted in Figure 4.4.1 (Example 4.3
Figure 4.4.2 The output voltage of the circuit depicted in Figure 4.4.1 (Example 4.3
Figure 4.5.2 The output voltage of the circuit depicted in Figure 4.5.1
Figure 4.5.2 The output voltage of the circuit depicted in Figure 4.5.1
Figure 4.5.2 The output voltage of the circuit depicted in Figure 4.5.1
Figure 4.5.2 The output voltage of the circuit depicted in Figure 4.5.1
Figure 4.6 The circuit for Example 4.5
Figure 4.6 The circuit for Example 4.5
The formula (2.10) for the s-domain equivalent in Figure 4.6(c) can be used to write the node equation as
The formula (2.10) for the s-domain equivalent in Figure 4.6(c) can be used to write the node equation as
Equation (E4.6.1) is substituted for V>(s) into the right-hand side (RHS) of Equation (E4.6.2), and the unknown terms on the RHS are moved to the LHS to write
Equation (E4.6.1) is substituted for V>(s) into the right-hand side (RHS) of Equation (E4.6.2), and the unknown terms on the RHS are moved to the LHS to write
Figure 4.10 Construction of dual circuits
Figure 4.10 Construction of dual circuits
Table 4.1 Variables and parameters dual to each other
Table 4.1 Variables and parameters dual to each other
Figure 4.12 The input—output relationship of a linear time-invariant (LTT) system — convolutior
Figure 4.12 The input—output relationship of a linear time-invariant (LTT) system — convolutior
Substituting these parameter values into Equation (E4.8.4) and taking the inverse Laplace transform yields Figure 4.13 Simulation of the circuit depicted in Figure 4.9(a) (for Example 4.9
Substituting these parameter values into Equation (E4.8.4) and taking the inverse Laplace transform yields Figure 4.13 Simulation of the circuit depicted in Figure 4.9(a) (for Example 4.9
Figure 4.13 Simulation of the circuit depicted in Figure 4.9(a) (for Example 4.9
Figure 4.13 Simulation of the circuit depicted in Figure 4.9(a) (for Example 4.9
Note. Readers are encouraged to use MATLAB or its equivalent to obtain the solutions.
Note. Readers are encouraged to use MATLAB or its equivalent to obtain the solutions.
Note. The circuit in Figure P4.12 saves one OP Amp compared with another (two-stage) double integrator made of two integrators connected in cascade, but instead requires more resistors/capacitors.
Note. The circuit in Figure P4.12 saves one OP Amp compared with another (two-stage) double integrator made of two integrators connected in cascade, but instead requires more resistors/capacitors.
(b) A second-order active highpass filter
(b) A second-order active highpass filter
Consider the OP Amp circuit of Figure P4.13 in which all the initial conditions are assumed to be zero.
Consider the OP Amp circuit of Figure P4.13 in which all the initial conditions are assumed to be zero.
generated by the current i [A] flowing through the N-turn coil is Ni[A - turns] and produces a magneti flux
generated by the current i [A] flowing through the N-turn coil is Ni[A - turns] and produces a magneti flux
Thus the flux linkage of each coil can be written as (a) Positive mutual inductance for additive coupling ¢b) Negative mutual inductance for subtractive coupling Figure 5.2 Relative winding directions of magnetically coupled coils
Thus the flux linkage of each coil can be written as (a) Positive mutual inductance for additive coupling ¢b) Negative mutual inductance for subtractive coupling Figure 5.2 Relative winding directions of magnetically coupled coils
Figure 5.4 To find the relative winding directions of magnetically coupled coils
Figure 5.4 To find the relative winding directions of magnetically coupled coils
The overall voltage—current relationship and the resulting inductance of the circuit connected as in Figure 5.5(b) is Figure 5.5 Test to measure a mutual inductance
The overall voltage—current relationship and the resulting inductance of the circuit connected as in Figure 5.5(b) is Figure 5.5 Test to measure a mutual inductance
The overall voltage—current relationship and the resulting inductance of the circuit connected as in Figure 5.5(b) is
The overall voltage—current relationship and the resulting inductance of the circuit connected as in Figure 5.5(b) is
Figure 5.6.1 The equivalent model of two magnetically coupled coils with dependent sources
Figure 5.6.1 The equivalent model of two magnetically coupled coils with dependent sources
Figure 5.6.1 The equivalent model of two magnetically coupled coils with dependent sources Figure 5.6.2 The equivalent model of two magnetically coupled coils with no dependent source Note. Coupled inductors are mainly used for AC applications since coils are just like short-circuits in the DC steady state (Remark 3.2(2)).
Figure 5.6.1 The equivalent model of two magnetically coupled coils with dependent sources Figure 5.6.2 The equivalent model of two magnetically coupled coils with no dependent source Note. Coupled inductors are mainly used for AC applications since coils are just like short-circuits in the DC steady state (Remark 3.2(2)).
Figure 5.7.2. The same circuit as that of Figure 5.7.1(a), but with different winding direction or current reference direction
Figure 5.7.2. The same circuit as that of Figure 5.7.1(a), but with different winding direction or current reference direction
Figure 5.7.1 A circuit containing a pair of coupled coils and its s-domain equivalent
Figure 5.7.1 A circuit containing a pair of coupled coils and its s-domain equivalent
This node equation directly corresponds to the II-model for a pair of two magnetically coupled coils in Figure 5.6.2(b), which can be used to set up the node equation for circuits containing coupled coils. Note
This node equation directly corresponds to the II-model for a pair of two magnetically coupled coils in Figure 5.6.2(b), which can be used to set up the node equation for circuits containing coupled coils. Note
Figure 5.9 A circuit containing a pair of coupled coils
Figure 5.9 A circuit containing a pair of coupled coils
Figure 5.10.1 Simulation of a circuit containing a pair of coupled coils
Figure 5.10.1 Simulation of a circuit containing a pair of coupled coils
(b) Simulation Settings dialog box to set Analysis type to Time Dornain (Transient) Figure 5.10.2 Property Editor spreadsheet and simulation setting dialog box for PSpice simulation of Figure 5.10.1(al)
(b) Simulation Settings dialog box to set Analysis type to Time Dornain (Transient) Figure 5.10.2 Property Editor spreadsheet and simulation setting dialog box for PSpice simulation of Figure 5.10.1(al)
Figure 5.11 Dependent source models for an ideal transformer
Figure 5.11 Dependent source models for an ideal transformer
(a) Load impedance reflected into the primary side (b) Source impedance reflected into the secondary side Figure 5.12 Impedance transformation (multiplication) by an ideal transformer
(a) Load impedance reflected into the primary side (b) Source impedance reflected into the secondary side Figure 5.12 Impedance transformation (multiplication) by an ideal transformer
Figure 5.13 The s-domain linear transformer model
Figure 5.13 The s-domain linear transformer model
Figure 5.14 A step-up autotransformer and its s-domain equivalent
Figure 5.14 A step-up autotransformer and its s-domain equivalent
which is solved to find the primary/secondary currents, the voltage gain, and the current gain as Figure 5.15 A step-down autotransformer and its s-domain equivalent
which is solved to find the primary/secondary currents, the voltage gain, and the current gain as Figure 5.15 A step-down autotransformer and its s-domain equivalent
Figure P5.1 Series connections of two coupled coils
Figure P5.1 Series connections of two coupled coils
Figure P5.2 Parallel connections of two coupled coils and their equivalent circuits
Figure P5.2 Parallel connections of two coupled coils and their equivalent circuits
Note. Readers are encouraged to use MATLAB or its equivalent to solve these problems.
Note. Readers are encouraged to use MATLAB or its equivalent to solve these problems.
Figure P5.4 Perfectly coupled coils
Figure P5.4 Perfectly coupled coils
Figure P5.5.1 Equivalent models for coupled coils, each consisting of inductors and an ideal transformer with M if In<a<l i. M
Figure P5.5.1 Equivalent models for coupled coils, each consisting of inductors and an ideal transformer with M if In<a<l i. M
Figure P5.5.3 Equivalent models for coupled coils, each consisting of inductors and an ideal transformer with a=M / Ip
Figure P5.5.3 Equivalent models for coupled coils, each consisting of inductors and an ideal transformer with a=M / Ip
(b) An equivalent circuit with the pair of coupled coils replaced by its T-equivalent
(b) An equivalent circuit with the pair of coupled coils replaced by its T-equivalent
Figure P5.11 A current transformer used for measuring a large current
Figure P5.11 A current transformer used for measuring a large current
Figure P5.14 A circuit containing a set of three magnetically coupled coils with the relative coil windings denoted hv the dot marks
Figure P5.14 A circuit containing a set of three magnetically coupled coils with the relative coil windings denoted hv the dot marks
Figure 6.1 Phasor representation of the sum of two sinusoids
Figure 6.1 Phasor representation of the sum of two sinusoids
Figure 6.2. An RL circuit and the phasor transform approach versus the Laplace transform approact
Figure 6.2. An RL circuit and the phasor transform approach versus the Laplace transform approact
figure 6.3 The impedance triangle and phasor diagram for a series RLC circuit
figure 6.3 The impedance triangle and phasor diagram for a series RLC circuit
Consider the series RLC circuit of Figure 6.3(a). The phasor mesh current of the phasor-transformed circuit is obtained as Note. The phase angle of a load impedance equals the phase difference between the voltage and the current of the load 0= 0, — G. Note. I means the maximum/rms value of the current if V means the maximum/rms value of the voltage.
Consider the series RLC circuit of Figure 6.3(a). The phasor mesh current of the phasor-transformed circuit is obtained as Note. The phase angle of a load impedance equals the phase difference between the voltage and the current of the load 0= 0, — G. Note. I means the maximum/rms value of the current if V means the maximum/rms value of the voltage.
Figure 6.4 The admittance triangle and phasor diagram for a parallel RLC circuit
Figure 6.4 The admittance triangle and phasor diagram for a parallel RLC circuit
Table 6.1 A-Y and Y-A conversion formulas
Table 6.1 A-Y and Y-A conversion formulas
Figure 6.5 The phase difference between the voltages and the currents of the three loads with the impedance phase angle of 6 = 7/6 (phase lag), —7/4 (phase lead), and 0 (in phase)
Figure 6.5 The phase difference between the voltages and the currents of the three loads with the impedance phase angle of 6 = 7/6 (phase lag), —7/4 (phase lead), and 0 (in phase)
(d3) The Thevenin equivalent circuit Cat terminals -c} connected to the 40¢2-load
(d3) The Thevenin equivalent circuit Cat terminals -c} connected to the 40¢2-load
This result can be obtained by typing the following statements into the MATLAB command window:
This result can be obtained by typing the following statements into the MATLAB command window:
fc) With the voltage source VSIN ¢d? The PSpice simulation result (Time Domain - Transient analysis) with the sine-wave voltage source SIN for the current through R3 Figure 6.7 PSpice simulation for Example 6.1
fc) With the voltage source VSIN ¢d? The PSpice simulation result (Time Domain - Transient analysis) with the sine-wave voltage source SIN for the current through R3 Figure 6.7 PSpice simulation for Example 6.1
the node equation 1s set up, and then it 1s solved to express the voltage V7 across the test current source Matching this expression with Equation (2.14) yields the Thevenin equivalent voltage source and impedance of the circuit depicted in Figure 6.8(a):
the node equation 1s set up, and then it 1s solved to express the voltage V7 across the test current source Matching this expression with Equation (2.14) yields the Thevenin equivalent voltage source and impedance of the circuit depicted in Figure 6.8(a):
Figure 6.9 A bridge circuit (for Example 6.3)
Figure 6.9 A bridge circuit (for Example 6.3)
Figure 6.10 (for Example 6.4)
Figure 6.10 (for Example 6.4)
Figure 6.11 The instantaneous power depending on the load impedance phase angle
Figure 6.11 The instantaneous power depending on the load impedance phase angle
Figure 6.13 Power factor (PF) correction and power triangle
Figure 6.13 Power factor (PF) correction and power triangle
Note. Why is the overall PF lagging? Because the total reactive power Q is positive.
Note. Why is the overall PF lagging? Because the total reactive power Q is positive.
Figure 6.15 A circuit for maximum power transfer
Figure 6.15 A circuit for maximum power transfer
can be adjusted with the load impedance phase angle 0 fixed. For this case, the derivative of the average power expression (6.37) is taken w.r.t. |Z, | and set to zero to find the maximizing value of |Z, | as A question arises: ‘How do we meet this condition?’ The answer is to insert a transformer, hopefully an ideal one with no loss, between the source and the load, whose turns ratio is
can be adjusted with the load impedance phase angle 0 fixed. For this case, the derivative of the average power expression (6.37) is taken w.r.t. |Z, | and set to zero to find the maximizing value of |Z, | as A question arises: ‘How do we meet this condition?’ The answer is to insert a transformer, hopefully an ideal one with no loss, between the source and the load, whose turns ratio is
where I and V, are the load current and source voltage expressed in rms phasor Figure 6.17 An interface for maximum power transfer — impedance matchins
where I and V, are the load current and source voltage expressed in rms phasor Figure 6.17 An interface for maximum power transfer — impedance matchins
The following statements may be typed into the MATLAB command window to get the same result:
The following statements may be typed into the MATLAB command window to get the same result:
Figure 6.18 From the PSpice schematic to the simulation result for Example 6.7
Figure 6.18 From the PSpice schematic to the simulation result for Example 6.7
Figure 6.18 From the PSpice schematic to the simulation result for Example 6.7
Figure 6.18 From the PSpice schematic to the simulation result for Example 6.7
which yields L.. The magnitude of the admittance of the parallel R, and L, can also be used:
which yields L.. The magnitude of the admittance of the parallel R, and L, can also be used:
Negative (acb) sequence
Negative (acb) sequence
Note that for a Y-connected three-phase source, the amplitudes of line voltages are \/3 times that of phase voltages and the line current is the same as the phase current: Figure 7.3. A A-connected 3-¢ source and its current phasor diagram
Note that for a Y-connected three-phase source, the amplitudes of line voltages are \/3 times that of phase voltages and the line current is the same as the phase current: Figure 7.3. A A-connected 3-¢ source and its current phasor diagram
Figure 7.2 A Y-connected 3-¢ source and its voltage phasor diagram
Figure 7.2 A Y-connected 3-¢ source and its voltage phasor diagram
from the phasor diagram in Figure 7.4(b). The sum of these two readings yields the three-phase activ power: Figure 7.4 A circuit and its phasor diagram for the two-wattmeter method to measure a 3-¢ powel
from the phasor diagram in Figure 7.4(b). The sum of these two readings yields the three-phase activ power: Figure 7.4 A circuit and its phasor diagram for the two-wattmeter method to measure a 3-¢ powel
Figure 7.5 The Y-Y configuration of a three-phase power system
Figure 7.5 The Y-Y configuration of a three-phase power system
Note. With the mesh analysis, a set of two or three equations would have to be solved for L,, I, and I, Equation (7.16) for the load-side neutral voltage becomes
Note. With the mesh analysis, a set of two or three equations would have to be solved for L,, I, and I, Equation (7.16) for the load-side neutral voltage becomes
Figure 7.6 The Y-A/Y configuration of a three-phase power system
Figure 7.6 The Y-A/Y configuration of a three-phase power system
Figure 7.7 PSpice simulation of a three-phase power system
Figure 7.7 PSpice simulation of a three-phase power system
Figure 7.8 GFI process for preventing, detecting, and tripping a short-circuit, and the consequences of no grounding
Figure 7.8 GFI process for preventing, detecting, and tripping a short-circuit, and the consequences of no grounding
Figure 7.9 (From Reference [I-1]. Source: © Prentice-Hall)
Figure 7.9 (From Reference [I-1]. Source: © Prentice-Hall)
Table P7.1 Results of the theoretical analysis and PSpice simulation
Table P7.1 Results of the theoretical analysis and PSpice simulation
Hint. You can complete the following MATLAB program cir07p02.m and run it.
Hint. You can complete the following MATLAB program cir07p02.m and run it.
Figure P7.3_ Parallel combination of the Y-connected load and the A-connected load
Figure P7.3_ Parallel combination of the Y-connected load and the A-connected load
Figure P7.4 A Y-A connected 3¢-3w (three-phase three-wire) power system
Figure P7.4 A Y-A connected 3¢-3w (three-phase three-wire) power system
Table P7.5 Comparison of various power transmission schemes
Table P7.5 Comparison of various power transmission schemes
7.5 Comparison of Various Power Transmission Schemes
7.5 Comparison of Various Power Transmission Schemes
Figure 8.1 Lowpass filters and their typical frequency response relationship can be described by the transfer function and the frequency response as
Figure 8.1 Lowpass filters and their typical frequency response relationship can be described by the transfer function and the frequency response as
Figure 8.2(c) shows a series RL circuit where the voltage v(t) across the inductor L is taken as the output to the input voltage source v;(t). Its input—output relationship can be described by the transfer function Figure 8.2 Highpass filters and their typical frequency response
Figure 8.2(c) shows a series RL circuit where the voltage v(t) across the inductor L is taken as the output to the input voltage source v;(t). Its input—output relationship can be described by the transfer function Figure 8.2 Highpass filters and their typical frequency response
Figure 8.3 A bandpass filter and its typical frequency response function and the frequency response as
Figure 8.3 A bandpass filter and its typical frequency response function and the frequency response as
Figure 8.3 A bandpass filter and its typical frequency response function and the frequency response as
Figure 8.3 A bandpass filter and its typical frequency response function and the frequency response as
Figure 8.4 A parallel circuit and its equivalent
Figure 8.4 A parallel circuit and its equivalent
Figure 8.5 A practical parallel resonant circuit
Figure 8.5 A practical parallel resonant circuit
Figure 8.6 A bandstop filter and its typical frequency response
Figure 8.6 A bandstop filter and its typical frequency response
described by the transfer function and the frequency response as
described by the transfer function and the frequency response as
we can find the lower and upper 3 dB frequencies at which the magnitude |G(jq@)| of this frequency response is Gmnax /\V2 = 1/\/2 as Multiplying these two 3 dB frequencies and taking the square root yields
we can find the lower and upper 3 dB frequencies at which the magnitude |G(jq@)| of this frequency response is Gmnax /\V2 = 1/\/2 as Multiplying these two 3 dB frequencies and taking the square root yields
Figure 8.7 A bandstop filter
Figure 8.7 A bandstop filter
This indicates that the OP Amp circuit in Figure 8.8(b) works as a highpass filter (HPF) with the cutoff frequency of w, = 1/(R,C) and the DC gain of zero for s = jw = 0. Figure 8.8 First-order active filters
This indicates that the OP Amp circuit in Figure 8.8(b) works as a highpass filter (HPF) with the cutoff frequency of w, = 1/(R,C) and the DC gain of zero for s = jw = 0. Figure 8.8 First-order active filters
This indicates that the OP Amp circuit in Figure 8.8(b) works as a highpass filter (HPF) with the cutoff frequency of w, = 1/(R,C) and the DC gain of zero for s = jw = 0.
This indicates that the OP Amp circuit in Figure 8.8(b) works as a highpass filter (HPF) with the cutoff frequency of w, = 1/(R,C) and the DC gain of zero for s = jw = 0.
Having only a constant term in the numerator, this transfer function indicates that the circuit will function as a lowpass filter (LPF). Figure 8.9 Second-order active filters
Having only a constant term in the numerator, this transfer function indicates that the circuit will function as a lowpass filter (LPF). Figure 8.9 Second-order active filters
First, for the circuit of Figure 8.9(a), KCL is applied to node 1 and P to write the node equations a:
First, for the circuit of Figure 8.9(a), KCL is applied to node 1 and P to write the node equations a:
which can be arranged in compact (matrix—vector) form as Figure 8.10 Second-order active filters
which can be arranged in compact (matrix—vector) form as Figure 8.10 Second-order active filters
which can be arranged in compact (matrix—vector) form as
which can be arranged in compact (matrix—vector) form as
Second, for the circuit in Figure 8.9(b), KCL is applied to the nodes 1 and P to write the nod WWatiange ac KVp, this set of node equations can be arranged in matrix—vector form as
Second, for the circuit in Figure 8.9(b), KCL is applied to the nodes 1 and P to write the nod WWatiange ac KVp, this set of node equations can be arranged in matrix—vector form as
To analyze the circuit shown in Figure 8.12 (from Reference [N-1]), KCL is applied to nodes 1, 2, and 3 to write the node equations Figure 8.12 A second-order active (twin-T) bandstop filter (Source: J.W. Nilsson and S.A. Riedel, Electric Circuit: 5th edition, 1996. Source: © Addison-Wesley)
To analyze the circuit shown in Figure 8.12 (from Reference [N-1]), KCL is applied to nodes 1, 2, and 3 to write the node equations Figure 8.12 A second-order active (twin-T) bandstop filter (Source: J.W. Nilsson and S.A. Riedel, Electric Circuit: 5th edition, 1996. Source: © Addison-Wesley)
Now, noting that the circuit in Figure 8.11(b) is the same as that in Figure 8.11(a), except that R and C are exchanged, its transfer function can be written as
Now, noting that the circuit in Figure 8.11(b) is the same as that in Figure 8.11(a), except that R and C are exchanged, its transfer function can be written as
which can be arranged in compact (matrix—vector) form as This can be solved to get V, and finally the transfer function G(s) as
which can be arranged in compact (matrix—vector) form as This can be solved to get V, and finally the transfer function G(s) as
Figure 8.13 The PSpice schematic and the simulation result for Example 8.6
Figure 8.13 The PSpice schematic and the simulation result for Example 8.6
Figure 8.14 Specification on the log-magnitude of the frequency response of an analog filter
Figure 8.14 Specification on the log-magnitude of the frequency response of an analog filter
Figure 8.16 Frequency responses of the filters designed in Example 8.7
Figure 8.16 Frequency responses of the filters designed in Example 8.7
Consider the circuit of Figure P8.1.
Consider the circuit of Figure P8.1.
Hint. The following MATLAB program cir08p08.m might be used
Hint. The following MATLAB program cir08p08.m might be used
b) Verify that the circuit of Figure P8.11(b) has the following transfer functio1
b) Verify that the circuit of Figure P8.11(b) has the following transfer functio1
Table P8.12 Results of the MATLAB analysis and PSpice simulation
Table P8.12 Results of the MATLAB analysis and PSpice simulation
Figure P8.13.2 Two realizations of a fourth-order Butterworth lowpass filter (LPF)
Figure P8.13.2 Two realizations of a fourth-order Butterworth lowpass filter (LPF)
Trigonometric Form: where the Fourier coefficients ag, a,, and b; are
Trigonometric Form: where the Fourier coefficients ag, a,, and b; are
Table 9.1 Reduced computation of Fourier coefficients exploiting symmetries of x(t Symmetry of a periodic function with period 7
Table 9.1 Reduced computation of Fourier coefficients exploiting symmetries of x(t Symmetry of a periodic function with period 7
Figure 9.1 Example of rectangular and triangular waves Example 9.1) Fourier Spectra of a Rectangular (Square) Wave and a Triangular Wave
Figure 9.1 Example of rectangular and triangular waves Example 9.1) Fourier Spectra of a Rectangular (Square) Wave and a Triangular Wave
Figure 9.2 Rectangular/triangular waves and their magnitude spectra
Figure 9.2 Rectangular/triangular waves and their magnitude spectra
Equation (9.1b) is used to obtain the Fourier coefficients as Thus the Fourier series representation of the triangular wave x(t) can be written as
Equation (9.1b) is used to obtain the Fourier coefficients as Thus the Fourier series representation of the triangular wave x(t) can be written as
Figure 9.3 Half /full-wave rectified cosine waves and their magnitude spectre
Figure 9.3 Half /full-wave rectified cosine waves and their magnitude spectre
Figure 9.4 PSpice simulation and analysis for Example 9.3
Figure 9.4 PSpice simulation and analysis for Example 9.3
Figure 9.4 PSpice simulation and analysis for Example 9.3
Figure 9.4 PSpice simulation and analysis for Example 9.3
Figure 9.5 PSpice simulation for a rectifier (Example 9.4)
Figure 9.5 PSpice simulation for a rectifier (Example 9.4)
Thus the magnitudes of the DC component and the first harmonic in the output are
Thus the magnitudes of the DC component and the first harmonic in the output are
Figure 9.6 The admissible region for (C, L) to satisfy the design specification on the relative magnitude of the majot harmonic to the DC component
Figure 9.6 The admissible region for (C, L) to satisfy the design specification on the relative magnitude of the majot harmonic to the DC component
Figure 9.6 The admissible region for (C, L) to satisfy the design specification on the relative magnitude of the majot harmonic to the DC component
Figure 9.6 The admissible region for (C, L) to satisfy the design specification on the relative magnitude of the majot harmonic to the DC component
At this point, it might be asked how this expression is related to the output equation (E9.3.4) that was obtained in Example 9.3:
At this point, it might be asked how this expression is related to the output equation (E9.3.4) that was obtained in Example 9.3:
figure 9.7 Fourier series solution and Laplace transform solution
figure 9.7 Fourier series solution and Laplace transform solution
Figure 9.8 An RLC circuit excited by a square-wave source
Figure 9.8 An RLC circuit excited by a square-wave source
the output to a step input V,,u<(t) with the Laplace transform of £{V,,u,(t)} = V/s can be obtained as Now the output to the square-wave input is going to be found twice, once by using the Laplace transform and once by using the Fourier series.
the output to a step input V,,u<(t) with the Laplace transform of £{V,,u,(t)} = V/s can be obtained as Now the output to the square-wave input is going to be found twice, once by using the Laplace transform and once by using the Fourier series.
9.1 Fourier Series Representations of a Multistep Function and a Sawtooth Function
9.1 Fourier Series Representations of a Multistep Function and a Sawtooth Function
Note. Since the relative magnitude of the third harmonic (3@) component to the fundamental frequency (ao) one in the square-wave input is 1/3, find the condition for
Note. Since the relative magnitude of the third harmonic (3@) component to the fundamental frequency (ao) one in the square-wave input is 1/3, find the condition for
The six sets of parameters characterizing the two-port network are defined via the following equations: Immittance (Impedance/Admittance) Parameters Circuit Systems with MATLAB™ and PSpice” Won Y. Yang and Seung C. Lee © 2007 John Wiley & Sons (Asia) Pte Ltd. ISBN: 978-0-470-82232-6
The six sets of parameters characterizing the two-port network are defined via the following equations: Immittance (Impedance/Admittance) Parameters Circuit Systems with MATLAB™ and PSpice” Won Y. Yang and Seung C. Lee © 2007 John Wiley & Sons (Asia) Pte Ltd. ISBN: 978-0-470-82232-6
Figure 10.1 A two-port network Note that, while the z and y-parameter matrices make the inverse of each other and so do the h and g parameter matrices, the a and b-parameter matrices do not have such an inverse relationship.
Figure 10.1 A two-port network Note that, while the z and y-parameter matrices make the inverse of each other and so do the h and g parameter matrices, the a and b-parameter matrices do not have such an inverse relationship.
Find the z-parameters of the two-port network in Figure 10.2(a).
Find the z-parameters of the two-port network in Figure 10.2(a).
Figure 10.1 A two-port network
Figure 10.1 A two-port network
Find the y-parameters of the two-port network in Figure 10.3(a):
Find the y-parameters of the two-port network in Figure 10.3(a):
Then this equation is matched with Equation (10.2) to get the same y-parameter as above in matrix form
Then this equation is matched with Equation (10.2) to get the same y-parameter as above in matrix form
Figure 10.6 A model for a common-emitter transistor (Example 10.5)
Figure 10.6 A model for a common-emitter transistor (Example 10.5)
Similarly, the conversion formulas involving the y, b, and g-parameters can be derived, all of which ar listed in Table 10.1 and cast into the MATLAB routine port conversion( ). Table 10.1 The conversion among two-port parameters
Similarly, the conversion formulas involving the y, b, and g-parameters can be derived, all of which ar listed in Table 10.1 and cast into the MATLAB routine port conversion( ). Table 10.1 The conversion among two-port parameters
Table 10.2 Network functions for a two-port network
Table 10.2 Network functions for a two-port network
Figure 10.7. A reciprocal two-port network
Figure 10.7. A reciprocal two-port network
Figure 10.8 Series connection of two two-port networks
Figure 10.8 Series connection of two two-port networks
Figure 10.9 Parallel connection of two two-port networks
Figure 10.9 Parallel connection of two two-port networks
Figure 10.10 Series—parallel connection of two two-port networks
Figure 10.10 Series—parallel connection of two two-port networks
Figure 10.11 Parallel—series connection of two two-port networks
Figure 10.11 Parallel—series connection of two two-port networks
Figure 10.13 An example of two-port networks violating the port condition after connection
Figure 10.13 An example of two-port networks violating the port condition after connection
Figure 10.12 Cascade connection of two two-port networks
Figure 10.12 Cascade connection of two two-port networks
Thus the z-parameter matrix is obtained and its inverse taken to get the y-parameter matrix a:
Thus the z-parameter matrix is obtained and its inverse taken to get the y-parameter matrix a:
Figure 10.14 Examples of two-port networks violating the port condition after connectior
Figure 10.14 Examples of two-port networks violating the port condition after connectior
Figure 10.15 A circuit model for a common-emitter transistor
Figure 10.15 A circuit model for a common-emitter transistor
and that of the lower subnetwork can be obtained by taking the inverse of the z-parameter matrix as Figure 10.16 A two-port network and its parallel decomposition
and that of the lower subnetwork can be obtained by taking the inverse of the z-parameter matrix as Figure 10.16 A two-port network and its parallel decomposition
As an example, an expression will be found for the above properties in terms of the z-parameters. With this objective in mind, the two-port network is regarded as a series connection of two subnetworks as Figure 10.17 A two-port network with a source and a load and its equivalent circuits
As an example, an expression will be found for the above properties in terms of the z-parameters. With this objective in mind, the two-port network is regarded as a series connection of two subnetworks as Figure 10.17 A two-port network with a source and a load and its equivalent circuits
These two y-parameter matrices are added to get the y-parameters of the overall network as This agrees with Equation (E10.6.2), which is the result obtained in Example 10.6.
These two y-parameter matrices are added to get the y-parameters of the overall network as This agrees with Equation (E10.6.2), which is the result obtained in Example 10.6.
Equation (10.31) can be substituted into Equations (10.29) and (10.30-1) to get Now, in order to find the Thevenin equivalent circuit of the network seen from the load (at the outpu port), Equation (10.30-1) can be written as
Equation (10.31) can be substituted into Equations (10.29) and (10.30-1) to get Now, in order to find the Thevenin equivalent circuit of the network seen from the load (at the outpu port), Equation (10.30-1) can be written as
depicted in Figure 10.17(b) and the voltage—current relationships of the two-port network itself and the overall network including the source/load are written as Substituting this into Equation (10.29-1) yields the input impedance of the network including the load impedance as
depicted in Figure 10.17(b) and the voltage—current relationships of the two-port network itself and the overall network including the source/load are written as Substituting this into Equation (10.29-1) yields the input impedance of the network including the load impedance as
and substituting this into Equation (10.29-2) yields Note. It is no wonder that this output impedance Zr, and the input impedance Z;, (Equation (10.32)) are symmetric.
and substituting this into Equation (10.29-2) yields Note. It is no wonder that this output impedance Zr, and the input impedance Z;, (Equation (10.32)) are symmetric.
In order to get the output impedance of a two-port network, the input port is shorted to remove the effect of the source so that V; = 0. In order to get the Thevenin equivalent voltage source of a two-port network seen from the output port, the output port is opened to cut off any load effect so that J = 0.
In order to get the output impedance of a two-port network, the input port is shorted to remove the effect of the source so that V; = 0. In order to get the Thevenin equivalent voltage source of a two-port network seen from the output port, the output port is opened to cut off any load effect so that J = 0.
Table 10.3. The properties of a two-port network in terms of its parameters
Table 10.3. The properties of a two-port network in terms of its parameters
Figure 10.18 The y-parameter of a two-port network including a load impedance, regarded as a parallel interconnection with the overall output port open
Figure 10.18 The y-parameter of a two-port network including a load impedance, regarded as a parallel interconnection with the overall output port open
Figure 10.19 The h-parameter of a two-port network including a load impedance, regarded as a series—parallel interconnection with the overall output port open
Figure 10.19 The h-parameter of a two-port network including a load impedance, regarded as a series—parallel interconnection with the overall output port open
Note. The Thevenin equivalent voltage seen from the output port can be obtained as follows: Figure 10.20 The a-parameter of a two-port network including a load impedance, regarded as a cascade inter connection with the overall output port open
Note. The Thevenin equivalent voltage seen from the output port can be obtained as follows: Figure 10.20 The a-parameter of a two-port network including a load impedance, regarded as a cascade inter connection with the overall output port open
To obtain the overall a and b-parameters, the overall network is regarded as a cascade interconnectior (with the output port open), as depicted in Figure 10.20, and Equation (10.28) is used:
To obtain the overall a and b-parameters, the overall network is regarded as a cascade interconnectior (with the output port open), as depicted in Figure 10.20, and Equation (10.28) is used:
Table 10.4 The properties of a two-port network having a source/load in terms of its parameters
Table 10.4 The properties of a two-port network having a source/load in terms of its parameters
Figure 10.21 The z-parameter of a two-port network including a load impedance, regarded as a series interconnec- tion with the overall output port shorted
Figure 10.21 The z-parameter of a two-port network including a load impedance, regarded as a series interconnec- tion with the overall output port shorted
Figure 10.21 The z-parameter of a two-port network including a load impedance, regarded as a series interconnec- tion with the overall output port shorted Figure 10.22 The g-parameter of a two-port network including a load impedance, regarded as a parallel—series interconnection with the overall output port shorted
Figure 10.21 The z-parameter of a two-port network including a load impedance, regarded as a series interconnec- tion with the overall output port shorted Figure 10.22 The g-parameter of a two-port network including a load impedance, regarded as a parallel—series interconnection with the overall output port shorted
Figure 10.24 The z-parameter of a two-port network including a source impedance, regarded as a series inte1 connection with the overall input port shorted
Figure 10.24 The z-parameter of a two-port network including a source impedance, regarded as a series inte1 connection with the overall input port shorted
Figure 10.23 The a-parameter of a two-port network including a load impedance, regarded as a cascade inter- connection with the overall output port shorted
Figure 10.23 The a-parameter of a two-port network including a load impedance, regarded as a cascade inter- connection with the overall output port shorted
Figure 10.25 The h-parameter of a two-port network including a source impedance regarded as a series—parallel interconnection with the overall input port shorted
Figure 10.25 The h-parameter of a two-port network including a source impedance regarded as a series—parallel interconnection with the overall input port shorted
In this section we will study various structures of feedback amplifiers and find their input-output properties based on their two-port parameters. Figure 10.26 The a-parameter of a two-port network including a source impedance, regarded as a cascade interconnection with the overall input port shorted
In this section we will study various structures of feedback amplifiers and find their input-output properties based on their two-port parameters. Figure 10.26 The a-parameter of a two-port network including a source impedance, regarded as a cascade interconnection with the overall input port shorted
Figure 10.27 The series—parallel (shunt) feedback amplifier
Figure 10.27 The series—parallel (shunt) feedback amplifier
Just because the z-parameters are easy to obtain for the upper subnetwork, first its z-parameter matrix is found and it is then converted to the h-parameter matrix as These two h-parameter matrices can be added to get the h-parameters of the whole network as
Just because the z-parameters are easy to obtain for the upper subnetwork, first its z-parameter matrix is found and it is then converted to the h-parameter matrix as These two h-parameter matrices can be added to get the h-parameters of the whole network as
Figure 10.29 shows the basic structure of the parallel—parallel feedback amplifier, which consists of an amplifier with the open-loop gain G and a VCIS (voltage-controlled current source) with the gain H in Figure 10.29 The parallel (shunt)—parallel (shunt) feedback amplifier
Figure 10.29 shows the basic structure of the parallel—parallel feedback amplifier, which consists of an amplifier with the open-loop gain G and a VCIS (voltage-controlled current source) with the gain H in Figure 10.29 The parallel (shunt)—parallel (shunt) feedback amplifier
Figure 10.28 The series—series feedback amplifier the feedback path. For this series—series interconnection of two subnetworks it would be good to use the z-parameters. The z-parameter matrices of the upper/lower subnetworks are
Figure 10.28 The series—series feedback amplifier the feedback path. For this series—series interconnection of two subnetworks it would be good to use the z-parameters. The z-parameter matrices of the upper/lower subnetworks are
the feedback path. For this series—series interconnection of two subnetworks it would be good to use the z-parameters. The z-parameter matrices of the upper/lower subnetworks are We can add these two z-parameter matrices to get the z-parameters of the whole network a:
the feedback path. For this series—series interconnection of two subnetworks it would be good to use the z-parameters. The z-parameter matrices of the upper/lower subnetworks are We can add these two z-parameter matrices to get the z-parameters of the whole network a:
Figure 10.30 The parallel (shunt)—series feedback amplifier
Figure 10.30 The parallel (shunt)—series feedback amplifier
Figure 10.31 The block diagram showing the relationship among several signals in a general feedback system
Figure 10.31 The block diagram showing the relationship among several signals in a general feedback system
(b1) The circuit for determining the open-loop gain (b2) The circuit for determining the feedback gain
(b1) The circuit for determining the open-loop gain (b2) The circuit for determining the feedback gain
is obtained from the circuit with the feedback path removed as depicted in Figure 10.33(b1), the feedforward gain Figure 10.33 An OP Amp circuit regarded as a feedback system
is obtained from the circuit with the feedback path removed as depicted in Figure 10.33(b1), the feedforward gain Figure 10.33 An OP Amp circuit regarded as a feedback system
Note. Equation (10.76) can also be obtained from the node analysis (see Example 10.9). Figure 10.34 A feedback amplifier regarded as a feedback system
Note. Equation (10.76) can also be obtained from the node analysis (see Example 10.9). Figure 10.34 A feedback amplifier regarded as a feedback system
For given a and b-parameters, one choice is the model having a VCVS, a CCVS (current-controlled voltage source), and a CCCS as depicted in Figures 10.38(a) and (b). Figure 10.35 Two-port network models with a given z-parameter matrix
For given a and b-parameters, one choice is the model having a VCVS, a CCVS (current-controlled voltage source), and a CCCS as depicted in Figures 10.38(a) and (b). Figure 10.35 Two-port network models with a given z-parameter matrix
Figure 10.35 Two-port network models with a given z-parameter matrix Figure 10.36 Two-port network models with a given y-parameter matrix
Figure 10.35 Two-port network models with a given z-parameter matrix Figure 10.36 Two-port network models with a given y-parameter matrix
Figure 10.37 Two-port network models with a given h/g-parameter matrix Figure 10.38 Two-port network models with a given a/b-parameter matrix
Figure 10.37 Two-port network models with a given h/g-parameter matrix Figure 10.38 Two-port network models with a given a/b-parameter matrix
Figure 10.39 The feedback amplifier of Figure 10.34(a) regarded as a parallel—parallel (shunt) connection of two two-port subnetworks
Figure 10.39 The feedback amplifier of Figure 10.34(a) regarded as a parallel—parallel (shunt) connection of two two-port subnetworks
Figure P10.1. A bridge circuit regarded as a two-port network
Figure P10.1. A bridge circuit regarded as a two-port network
Note. Readers are encouraged to use MATLAB or its equivalent to obtain the solutions.
Note. Readers are encouraged to use MATLAB or its equivalent to obtain the solutions.
Consider the two-port network in Figure P10.6(a).
Consider the two-port network in Figure P10.6(a).
Consider the two-port network in Figure P10.6(a).
Consider the two-port network in Figure P10.6(a).
Figure P10.12 Two-port networks in cascade connection
Figure P10.12 Two-port networks in cascade connection
Table A.1 Laplace transforms of basic functions Table A.2. Properties of Laplace transform
Table A.1 Laplace transforms of basic functions Table A.2. Properties of Laplace transform
Table A.2. Properties of Laplace transform
Table A.2. Properties of Laplace transform
The Laplace transform of the convolution y(t) = g(t) * x(t) turns out to be the product of the Laplace transforms of the two functions as
The Laplace transform of the convolution y(t) = g(t) * x(t) turns out to be the product of the Laplace transforms of the two functions as
Suppose the s-function X(s) is given in the form of a rational function, i.e. a ratio of an Mth-degree polynomial O(s) to an Nth-degree polynomial P(s) in s and is expanded into the partial fractions as Then the inverse Laplace transform of X(s) can be obtained as
Suppose the s-function X(s) is given in the form of a rational function, i.e. a ratio of an Mth-degree polynomial O(s) to an Nth-degree polynomial P(s) in s and is expanded into the partial fractions as Then the inverse Laplace transform of X(s) can be obtained as
B.1 Addition and Subtraction Note. For this multiplication to be done, the number of columns of A must equal the number of rows of B. Note. Note that the commutative law does not hold for the matrix multiplication, i.e. AB ~ BA.
B.1 Addition and Subtraction Note. For this multiplication to be done, the number of columns of A must equal the number of rows of B. Note. Note that the commutative law does not hold for the matrix multiplication, i.e. AB ~ BA.
Equations (B.3) and (B.6) can be used to get the determinant and the inverse matrix as
Equations (B.3) and (B.6) can be used to get the determinant and the inverse matrix as
The MATLAB function dsolve() can be used to solve symbolic differential equations.
The MATLAB function dsolve() can be used to solve symbolic differential equations.
Table G.1 Color code of resistors
Table G.1 Color code of resistors
Table G.4 Standard values of ceramic and mylar polyester capacitors
Table G.4 Standard values of ceramic and mylar polyester capacitors
Table G.2. Standard values of resistors
Table G.2. Standard values of resistors
Table G.3 Standard values of electrolytic capacitors [uF]
Table G.3 Standard values of electrolytic capacitors [uF]
Table G.5 Letter tolerance code of capacitors [%]
Table G.5 Letter tolerance code of capacitors [%]
Table G.6 Standard values of inductors
Table G.6 Standard values of inductors
f#] Capture CIS - Demo Edition - [Session Log] Figure H.1 New Project dialog box opened by clicking File/New/Project in the Capture CIS window
f#] Capture CIS - Demo Edition - [Session Log] Figure H.1 New Project dialog box opened by clicking File/New/Project in the Capture CIS window
Figure H.2 Capture window, Project Manager window, Schematic Editor window, and Place Part box opened by clicking the Place Part icon in the tool Palette
Figure H.2 Capture window, Project Manager window, Schematic Editor window, and Place Part box opened by clicking the Place Part icon in the tool Palette
Table H.1 Device types and PSpice part names
Table H.1 Device types and PSpice part names
Table H.2 Magnitude identifiers used by PSpice (Capture)
Table H.2 Magnitude identifiers used by PSpice (Capture)
Figure H.4 Examples of connections rejected by PSpice and the corresponding measures
Figure H.4 Examples of connections rejected by PSpice and the corresponding measures
(cl) Setting the Analysis tvpe (as Transient) and parameters Figure H.5 Setting the simulation condition in the Simulation Settings dialog box
(cl) Setting the Analysis tvpe (as Transient) and parameters Figure H.5 Setting the simulation condition in the Simulation Settings dialog box
Simulation Settings - tran (c2) Setting the Snalysis tvoe fas 4C Sweep) and parameters
Simulation Settings - tran (c2) Setting the Snalysis tvoe fas 4C Sweep) and parameters
(c2) Setting the Snalysis tvoe fas 4C Sweep) and parameters
(c2) Setting the Snalysis tvoe fas 4C Sweep) and parameters
Figure H.6 A typical schematic and its simulation result
Figure H.6 A typical schematic and its simulation result
Figure H.7 The Evalution Measurement dialog box
Figure H.7 The Evalution Measurement dialog box
a) 4n example of trace expression entered in the Add Traces dialog box
a) 4n example of trace expression entered in the Add Traces dialog box
a) 4n example of trace expression entered in the Add Traces dialog box
a) 4n example of trace expression entered in the Add Traces dialog box
You can also click the Plot/Axis Settings menu or double-click the x or y-axis to open the Axis Settings dialog box (Figure H.9) and select a tab of {X-Axis, Y-Axis,X-Grid, Y-Grid} to make a change of Figure H.9 The Axis Setting dialog box
You can also click the Plot/Axis Settings menu or double-click the x or y-axis to open the Axis Settings dialog box (Figure H.9) and select a tab of {X-Axis, Y-Axis,X-Grid, Y-Grid} to make a change of Figure H.9 The Axis Setting dialog box
Figure H.10 An example of the PSpice output file
Figure H.10 An example of the PSpice output file
To practice the DC sweep analysis, the CE (common-emitter) collector characteristic curves of a BJT (bipolar junction transistor) are found by simulating the circuit in Figure H.11(a). For this job, the (co) The Simulation Settings dialog box for the primary sweep variable (d} The Simulation Settings dialog box for the secondary sweep variable Figure H.11 Obtaining the CE collector characteristic curves (‘BJT_CEO.opj’
To practice the DC sweep analysis, the CE (common-emitter) collector characteristic curves of a BJT (bipolar junction transistor) are found by simulating the circuit in Figure H.11(a). For this job, the (co) The Simulation Settings dialog box for the primary sweep variable (d} The Simulation Settings dialog box for the secondary sweep variable Figure H.11 Obtaining the CE collector characteristic curves (‘BJT_CEO.opj’
Figure H.12 Plot of vgg,ip,ic, vce and Ape versus, Vgp (‘BJT_hFE.opj’)
Figure H.12 Plot of vgg,ip,ic, vce and Ape versus, Vgp (‘BJT_hFE.opj’)
(a) The PSpice schematic for a square-wave generator using an OP Amp Figure H.13 PSpice simulation of an OP amplifiers circuit (‘(OP_Amp_pos_feedback, opj’)
(a) The PSpice schematic for a square-wave generator using an OP Amp Figure H.13 PSpice simulation of an OP amplifiers circuit (‘(OP_Amp_pos_feedback, opj’)
(a) The PSpice schematic for a square-wave generator using an OP Amp
(a) The PSpice schematic for a square-wave generator using an OP Amp
Cc} The magnitude curve of the frequency response in the PSpice A/D (Probe) window
Cc} The magnitude curve of the frequency response in the PSpice A/D (Probe) window
Cc} The magnitude curve of the frequency response in the PSpice A/D (Probe) window gure H.15 PSpice simulation to get a frequency response (‘OP_Amp_filter_ac_sweep. opj’’
Cc} The magnitude curve of the frequency response in the PSpice A/D (Probe) window gure H.15 PSpice simulation to get a frequency response (‘OP_Amp_filter_ac_sweep. opj’’
(d) The Property Editor spreadsheet changed by adding a new column Figure H.16 Multiple AC Sweeps using Parametric Sweep (‘OP_Amp_filter_par.opj
(d) The Property Editor spreadsheet changed by adding a new column Figure H.16 Multiple AC Sweeps using Parametric Sweep (‘OP_Amp_filter_par.opj
(d) The Property Editor spreadsheet changed by adding a new column
(d) The Property Editor spreadsheet changed by adding a new column
‘d) The Fourier spectra of Vi and VOC) obtained by clicking the FFT icon in the tool bar
‘d) The Fourier spectra of Vi and VOC) obtained by clicking the FFT icon in the tool bar
‘d) The Fourier spectra of Vi and VOC) obtained by clicking the FFT icon in the tool bar
‘d) The Fourier spectra of Vi and VOC) obtained by clicking the FFT icon in the tool bar
In order to understand and verify these analysis results, find the sensitivities, DC gains, and the input/ output impedances by using an analytical method as follows.
In order to understand and verify these analysis results, find the sensitivities, DC gains, and the input/ output impedances by using an analytical method as follows.
(b) The Simulation Settings dialog box for DC Sensitivity and Transfer Function analyses
(b) The Simulation Settings dialog box for DC Sensitivity and Transfer Function analyses
#| Capture CIS - Demo Edition
#| Capture CIS - Demo Edition
Figure H.19 Example of Monte Carlo simulation (‘BJT_CE_amp1_mon.opj’
Figure H.19 Example of Monte Carlo simulation (‘BJT_CE_amp1_mon.opj’
Ce) The Monte Carlo simulation result printed in the output file
Ce) The Monte Carlo simulation result printed in the output file
a) The schematic of a BIT(Bipolar Junction Transistor) amplifier in the Capture window
a) The schematic of a BIT(Bipolar Junction Transistor) amplifier in the Capture window
fb} The Simulation Settings window for setting the analysis type to AC Sweep/Noise Figure H.20 Example of noise analysis (‘BJT_amp1_noise.opj’)
fb} The Simulation Settings window for setting the analysis type to AC Sweep/Noise Figure H.20 Example of noise analysis (‘BJT_amp1_noise.opj’)
Figure I.1_ The MATLAB command window with the workspace and command history boxes
Figure I.1_ The MATLAB command window with the workspace and command history boxes
Table I.1 Functions and Variables in MATLAB
Table I.1 Functions and Variables in MATLAB
Table I.2 Graphic line specifications used in the plot( ) command
Table I.2 Graphic line specifications used in the plot( ) command

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